No you’re right, use 2 or 3 instead of 4 as an average dielectric constant. The document you linked cites https://ieeexplore.ieee.org/abstract/document/7325600 which gives measured resistances and capacitances for the various layers. For Intel’s 14 nm process making use of low-k, ultra-low-k dielectrics, and air gaps, they show numbers down to 0.15 fF/micron, about 15 times higher than ϵ0.
I remember learning that aspect ratio and dielectric constant alone don’t suffice to explain the high capacitances of interconnects. Instead, you have to include fringe fields—turns out they’re not actually infinite parallel plates (gasp!).
Again, it’s not a big deal and doesn’t detract much from your analysis. I somewhat regret even bringing it up because of how not important it is :)
No you’re right, use 2 or 3 instead of 4 as an average dielectric constant. The document you linked cites https://ieeexplore.ieee.org/abstract/document/7325600 which gives measured resistances and capacitances for the various layers. For Intel’s 14 nm process making use of low-k, ultra-low-k dielectrics, and air gaps, they show numbers down to 0.15 fF/micron, about 15 times higher than ϵ0.
I remember learning that aspect ratio and dielectric constant alone don’t suffice to explain the high capacitances of interconnects. Instead, you have to include fringe fields—turns out they’re not actually infinite parallel plates (gasp!).
Again, it’s not a big deal and doesn’t detract much from your analysis. I somewhat regret even bringing it up because of how not important it is :)
I just edited the text, thanks.