I think when people discuss Moore’s Law slowing, they are usually discussing transistor density on a 2D board rather than transistor count.
The radius of a silicon atom is ~0.2nm, and transistors are currently at the 5nm scale commercially. Since transistors (with current designs) need to be made out of at least one silicon atom, there’s only log2(5/0.2) = ~4 possible 1D-halvings, or ~16 2D-halvings left before we’re hitting the floor of physical possibility. That’s ignoring quantum effects which make it difficult to achieve reasonable commercial yield—which is the issue that companies are struggling with.
The 5nm in “5nm scale” no longer means “things are literally 5nm in size”. Rather, it’s become a fancy way of saying something like “200x the linear transistor density of an old 1-micron scale chip”. The gates are still larger than 5nm, it’s just that things are now getting put on their side to make more room ( https://en.wikipedia.org/wiki/FinFET ). Some chip measures sure are slowing down, but Moore’s law (referring to the number of transistors per chip and nothing else) still isn’t one of them despite claims of impending doom due to “quantum effects” originally dating back to (IIRC) the eighties.
I think when people discuss Moore’s Law slowing, they are usually discussing transistor density on a 2D board rather than transistor count.
The radius of a silicon atom is ~0.2nm, and transistors are currently at the 5nm scale commercially. Since transistors (with current designs) need to be made out of at least one silicon atom, there’s only log2(5/0.2) = ~4 possible 1D-halvings, or ~16 2D-halvings left before we’re hitting the floor of physical possibility. That’s ignoring quantum effects which make it difficult to achieve reasonable commercial yield—which is the issue that companies are struggling with.
The 5nm in “5nm scale” no longer means “things are literally 5nm in size”. Rather, it’s become a fancy way of saying something like “200x the linear transistor density of an old 1-micron scale chip”. The gates are still larger than 5nm, it’s just that things are now getting put on their side to make more room ( https://en.wikipedia.org/wiki/FinFET ). Some chip measures sure are slowing down, but Moore’s law (referring to the number of transistors per chip and nothing else) still isn’t one of them despite claims of impending doom due to “quantum effects” originally dating back to (IIRC) the eighties.